GlobalFoundries

Circuit Design Intern

USA internshipsHardwarePosted 1 month ago

Location: Austin, TX
Type: USA internships

About this role

From GlobalFoundries’s careers page.

About GlobalFoundries

GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power-efficient and high-performance solutions for high-growth markets. GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity and sustainability. For more information, visit www.gf.com.

Internship Program Overview:

Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives.

Summary of Role:

GF’s Circuit Design Team is seeking a Summer 2027 intern in Austin, Texas. The intern will perform block-level physical design using place-and-route tools and industry-standard cores to evaluate GF technologies, while supporting RTL analysis and simulation to validate correct implementation and benchmark power, performance, and area.

Essential Responsibilities include:

Perform block-level place and route for complex cores using standard-cell and memory-library IP across multiple GF technologies.
Run RTL simulation and verification flows to confirm correct core implementation and support power benchmarking and design analysis.
Apply circuit-design techniques to optimize standard-cell logic and improve IP performance, power, area, and implementation quality.
Develop and maintain Tcl and Perl scripts that automate physical-design and RTL-simulation workflows, reporting, and data collection.
Optimize standard-cell and memory IP through block-level design studies for Edge AI and automotive applications.
Use industry-standard CAD and electronic design automation tools to support VLSI implementation, analysis, debugging, and documentation.

Other Responsibilities:

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

Education – At least a sophomore at time of application and actively pursuing a Master’s or PhD in Electrical Engineering, Computer Science, or related field through an accredited degree program during the time of internship.
Must have at least an overall 3.0 GPA and be in good academic standing.
Language Fluency - English (Written & Verbal)
Ability to work at least 40 hours per week during the internship.

Preferred Qualifications:

Prior related internship or co-op experience
Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
Strong interest in leveraging AI tools and emerging technologies to enhance productivity, streamline workflows, and support effective decision-making.
Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
Strong written and verbal communication skills
Strong planning & organizational skills
Working knowledge of UNIX operating systems
Coursework, research, or project experience in VLSI design, physical design, RTL simulation, standard-cell or memory IP, or semiconductor circuit design.
Familiarity with place-and-route, RTL simulation, CAD/EDA tools, and Tcl or Perl scripting.

#InternshipProgramUS

Expected Salary Range

$20.00 - $40.00

Expected Salary Range

$0.00 - $0.00

The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law

Apply nowOpens GlobalFoundries’s application page

About this role

From GlobalFoundries’s careers page.

About GlobalFoundries

Internship Program Overview:

Summary of Role:

Essential Responsibilities include:

Perform block-level place and route for complex cores using standard-cell and memory-library IP across multiple GF technologies.
Run RTL simulation and verification flows to confirm correct core implementation and support power benchmarking and design analysis.
Apply circuit-design techniques to optimize standard-cell logic and improve IP performance, power, area, and implementation quality.
Develop and maintain Tcl and Perl scripts that automate physical-design and RTL-simulation workflows, reporting, and data collection.
Optimize standard-cell and memory IP through block-level design studies for Edge AI and automotive applications.
Use industry-standard CAD and electronic design automation tools to support VLSI implementation, analysis, debugging, and documentation.

Other Responsibilities:

Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

Education – At least a sophomore at time of application and actively pursuing a Master’s or PhD in Electrical Engineering, Computer Science, or related field through an accredited degree program during the time of internship.
Must have at least an overall 3.0 GPA and be in good academic standing.
Language Fluency - English (Written & Verbal)
Ability to work at least 40 hours per week during the internship.

Preferred Qualifications:

Prior related internship or co-op experience
Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
Strong interest in leveraging AI tools and emerging technologies to enhance productivity, streamline workflows, and support effective decision-making.
Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
Strong written and verbal communication skills
Strong planning & organizational skills
Working knowledge of UNIX operating systems
Coursework, research, or project experience in VLSI design, physical design, RTL simulation, standard-cell or memory IP, or semiconductor circuit design.
Familiarity with place-and-route, RTL simulation, CAD/EDA tools, and Tcl or Perl scripting.

#InternshipProgramUS

Expected Salary Range

$20.00 - $40.00

Expected Salary Range

$0.00 - $0.00

The exact Salary will be determined based on qualifications, experience and location.

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.