Texas Instruments

Packaging Engineer - PhD

USA new gradHardwarePosted 10 days ago

Location: Santa Clara, CA
Type: USA new grad

About this role

From Texas Instruments’s careers page.

Change the world. Love your job.

In your first year with TI, you will participate in the Career Accelerator Program (CAP), which provides professional and technical training and resources to accelerate your ramp into TI, and set you up for long-term career success. Within this program, we also offer function-specific technical training and on-the-job learning opportunities that will encourage you to solve problems through a variety of hands-on, meaningful experiences from your very first day on the job. The TMG Development program is a 12-month program for new college graduates in the TMG organization.

Interface across various work areas and organizations to help with the design, development and analysis of different semiconductor packaging technologies to enable differentiation for TI's analog and embedded processing products. TI's innovative packaging technologies are designed to solve customers' problems by delivering advances in miniaturization, integration, high reliability, high performance, and low power. In this role you'll get the opportunity to thrive in a fast paced, dynamic environment where high-energy, prioritization skills and adaptability are a must!

Packaging engineers play an important role at TI which encompasses the following responsibilities:

Partner with the businesses to design and develop internal and external solutions for semiconductor packaging technologies, including Wirebond, Flip Chip, Modules, SIPs and other advanced packages at different stages of readiness
Participate in cross-functional teams, supporting product qualification and production, helping to meet reliability and yield requirements, design testability, and test coverage
Direct design-of-experiments and work with material suppliers to downselect innovative packaging materials to enhance the reliability and performance of advanced packages.
Conduct electrical, mechanical, thermal models to comprehend silicon-to-package interaction, establish design rules, and to predict and prevent the use of high risk designs.

As a Packaging engineer you will enjoy an environment of smart collaboration with a global team of the industry's top engineering minds at your disposal. TI's corporate culture is one of competitive spirit which fuels continued business growth and constant career opportunities. While ethical business practice is a central aspect of the work place-you will be treated with respect, dignity, kindness and courtesy.

Put your talent to work with us as a Packaging engineer !

Qualifications

Minimum Requirements:

PhD in Material Science, Mechanical Engineering, Chemical Engineering, Materials Science, Physics, Electrical Engineering, or related
Cumulative 3.0/4.0 GPA or higher

Preferred Qualifications:

Coursework or research in semiconductor packaging/fabrication
Experience with AutoCAD design and FEM modeling
Strong fundamentals in heat transfer, thermodynamics, and stress analysis
Experience with Semiconductor MEMS/3D integration design and fabrication
Project experience in the areas of: CVD, PVD, thin film deposition, electroplating, plasma etch, ML based package design, wafer bumping, or optical packaging
Experience with plating, adhesion, surface treatment process
Hands experience with semiconductor fabrication and characterization tools including VI Scopes, X-ray Inspection, materials characterization, and FA techniques
Strong written and verbal communication skills
Demonstrated analytical and problem solving skills
Ability to work in teams and collaborate effectively with people in different functions
Strong time management skills that enable on-time project delivery
Ability to build strong, influential relationships
Ability to work effectively in a fast-paced and rapidly changing environment
Ability to take the initiative and drive for results

Apply nowOpens Texas Instruments’s application page